inSrSSKJr SSKJrJrJrJrJrJ r SSK r SSK r SSK r SSK JrJrJrJrJrJrJr SSKJr SSKJr SSKJrJr SS KJr SS KJr SS K J!r! SS K"J#r# S SK$J%r%J&r& "SS\!5r'"SS\'5r("SS\'5r)g)z'Scheduler for dynamic circuit backends.)abstractmethod)DictListOptionalUnionSetTupleN)BitBarrierClbit ControlFlowOpMeasureQubitReset)ParameterExpression)circuit_to_dag) DAGCircuitDAGNode)Target)TranspilerError)TransformationPass)TimeUnitConversion)BlockOrderingCallableTypeblock_order_op_nodesc ^\rSrSrSrS!S\\RRRS\\ S\\ SS4U4Sjjjr \ S\\\\4\44S j5rS \S \\\4SS4S jrS \SS4SjrS \SS4Sjr\S \SS4Sj5r\S \SS4Sj5r\S \SS4Sj5rS\SS4SjrS \S\4SjrS"S \S\S\S\SS4 Sjjr S#Sjr!S#Sjr"S\#\4Sjr$S \SS4Sjr%S \S\&\4Sjr'S \S\&\4Sjr(S r)U=r*$)$BaseDynamicCircuitAnalysis!aGBase class for scheduling analysis This is a scheduler designed to work for the unique scheduling constraints of the dynamic circuits backends due to the limitations imposed by hardware. This is expected to evolve over time as the dynamic circuit backends also change. The primary differences are that: * Resets and control-flow currently trigger the end of a "quantum block". The period between the end of the block and the next is *nondeterministic* ie., we do not know when the next block will begin (as we could be evaluating a classical function of nondeterministic length) and therefore the next block starts at a *relative* t=0. * During a measurement it is possible to apply gates in parallel on disjoint qubits. * Measurements and resets on disjoint qubits happen simultaneously and are part of the same block. N durationsblock_ordering_callabletargetreturnc>U(a[R"S[SS9 XlX0lUc[ OUUlSUlSUlSUl SUl 0Ul 0Ul SUl SUlSUlSUlSUlSUl['5UlSUlSUlSUl[1U5Ul[4TU]m5 g)a9Scheduler for dynamic circuit backends. Args: durations: Durations of instructions to be used in scheduling. block_ordering_callable: A callable used to produce an ordering of the nodes to minimize the number of blocks needed. If not provided, :func:`~block_order_op_nodes` will be used. zThe `durations` input argument of `BaseDynamicCircuitAnalysis` is deprecated as of qiskit_ibm_runtime v0.43.0 and will be removed in a future release. Provide a `target` instance instead ex: BaseDynamicCircuitAnalysis(target=backend.target).) stacklevelNrF)warningswarnDeprecationWarning _durations_targetr_block_ordering_callable_dag _block_dag _wire_map_node_mapped_wires_node_block_dags_block_idx_dag_map_current_block_idx _max_block_t1_control_flow_block_node_start_time_node_stop_time_bit_stop_timesset_current_block_measures!_current_block_measures_has_reset _node_tied_to _bit_indicesr_time_unit_convertersuper__init__)selfrr r! __class__s s/home/james-whalen/.local/lib/python3.13/site-packages/qiskit_ibm_runtime/transpiler/passes/scheduling/scheduler.pyr?#BaseDynamicCircuitAnalysis.__init__3s  MME#  $ $;$C I` %+/ 0437FJ;=9;#$7;#( JNIMTX69U$7<.DH8<$6y$A! c4URUR$N)r7r2r@s rB_current_block_bit_times3BaseDynamicCircuitAnalysis._current_block_bit_timesns##D$;$;<# UHnTRUv M g7frFrH.0bitr@s rB DBaseDynamicCircuitAnalysis._visit_control_flow_op..  :O3D ) )# .:OT)r0max _map_wires_update_bit_timesrXblocksr4rzipqubitsclbitsappendrTrN) r@rSnode_block_dagst0t1rJnew_dagouterinnerinner_wire_maps ` rBrY1BaseDynamicCircuitAnalysis._visit_control_flow_ops9;:d#o  :>//$:O    t,WW^^E'+D $$U+G%((=w~~PWP^P^?^$_$_LE $_   " "7 +   g 6$ %%'s+C3c[erFNotImplementedErrorr]s rBrZ)BaseDynamicCircuitAnalysis._visit_measure!!rDc[erFrzr]s rBr['BaseDynamicCircuitAnalysis._visit_resetr}rDc[erFrzr]s rBr\)BaseDynamicCircuitAnalysis._visit_genericr}rDdagcnXlSUlURVs0sHo"U_M snUl0Ul0Ul0UlSUl0UlSUl [UR5S:wdURRSS5c [S5e0Ul0UlSUR UR"-Vs0sHo3S_M sn0Ul['5UlSUl0Ul[/UR 5VVs0sHupCX4_M snnUlgs snfs snfs snnf)zSetup for initial run.NrFrqz,ASAP schedule runs on physical circuits only)r,r-wiresr.r/r0r1r2r3r4lenqregsgetrr5r6rnror7r8r9r:r; enumerater<)r@rwirerindexs rB _init_run$BaseDynamicCircuitAnalysis._init_runs 14;*;"$ ""$"##( syy>Q #))--T":"B!"PQ Q "! !#**szz2I#J2IQqD2I#JK'*u$16.6? 6KL6K(%QX6KL%<$KMs D' D,D1c [UR[5(agURU5Vs/sHo RUPM nnUR S:XaURR nOUR S:XaSnOUR(aURRUR 5nU(dSnOUR[U55nU(dSnOoURRc UR nOKURRUR 5nO%URRURUSS9n[U[5(a)[SUSURR SUS 35eUc&[S URR SUS 35eU$s snf) Nrdelaybarrierdt)unitzParameterized duration (z) of z on qubits z is not bounded.z Duration of z is not found.)rWrXr _map_qubitsr<namedurationr*rtupler seconds_to_dtr)rr)r@rSqargindicesr props_dictpropss rB _get_duration(BaseDynamicCircuitAnalysis._get_durationsv dgg} - -7;7G7G7MN7Mt$$T*7MN 99 ww''H YY) #H \\))$))4J"uW~6#H||.#(>>#'<<#=#=enn#M**477G$*GH h 3 4 4!*8*5ggll^;wi7GI   !Lk'R`"ab b=OsGrrrs update_cargsc~[URRURS5U5URUR'U(aUR U5OUR U5nUHnX0R U'M URU4URU'URU4URU'g)Nr) rir3rr2rjrrHr5r6)r@rSrrrsr update_bitsrds rBrk,BaseDynamicCircuitAnalysis._update_bit_timess7:    " "4#:#:A >7 42230'>&Cd#&*&=&=r%BT"rDcBU=RS- slURURUR'SUlURRVs0sHoR US_M snUR UR'UR5 gs snf)z?Create a new timed circuit block completing the previous block.rFrN)r2r-r1r4rr.r7rP)r@rs rBrN3BaseDynamicCircuitAnalysis._begin_new_circuit_block s 1$;??? 7 78#( 040E0E9 0ENN4 ! #0E9 T445 9 sBcURH*nURR5URU'M, [5UlSUlg)zEFlush currently accumulated measurements by resetting block measures.FN)r9copyr;r8r:r]s rBrP*BaseDynamicCircuitAnalysis._flush_measuressE00D'+'C'C'H'H'JD  t $1(+u$16.rDcB^[U4SjTR55$)Nc3X># UHnTRU5Ho"v M M! g7frF)r)rcmeasurerr@s rBreJBaseDynamicCircuitAnalysis._current_block_measure_qargs.. s* # UHnTRUv M g7frFrarcrr@s rBre6ASAPScheduleAnalysis._visit_measure.. 6CD ) )! ,mrhrc3H># UHnTRUSv M g7frNr5rcrr@s rBrer#cFb7T**73A6Fb"N rr8rrir:rNrP itertoolschainr9addrrk r@rScurrent_block_measure_qargs measure_qargst0qrrrmeasure_durationrss ` rBrZ#ASAPScheduleAnalysis._visit_measureo'+&G&G&I#D,,T23  6C   ' 655--/$$&EcdFbFbcC $$((.33GB#11': &B  " "7 3 4rDcBSUlURU5 SUlgaVisit a reset node. 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